Dennis Silage, PhD
Professor
Electrical and Computer Engineering
Temple University

silage@temple.edu

Home

Trends in Embedded Design Using Programmable Gate Arrays

Bookstand Publishing
2013, ISBN 978-1-61863-541-9, 320 pages with downloadable complete Xilinx ISE project files.

This text is intended as a supplementary text and laboratory manual for undergraduate students in a contemporary course in digital logic and embedded systems. Professionals who have not had an exposure to the coarse grained FPGA, the Verilog HDL, an EDA software tool or the new paradigm of the controller and datapath and the FSM will find that this text facilitates an expansive experience with the tenets of digital signal processing, communications and control in embedded design. The References sections at the end of each Chapter contain a list of suitable undergraduate and graduate texts and reference books.

Trends in Embedded Design Using Programmable Gate Arrays describes the analysis and design of modern embedded processing systems using the field programmable gate array (FPGA). The FPGA has traditionally provided support for embedded design by implementing customized peripherals, controller and datapath constructs and finite state machines (FSM). Although microprocessor-based computer systems have usually been used for the design of larger scale embedded systems, the paradigm of the FPGA now challenges that notion of such a fixed architecture especially with the constraints of real-time.

This new paradigm in embedded design utilizes the Verilog hardware description language (HDL) behavioral synthesis of controller and datapath constructs and the FSM for digital signal processing , communications and control with the FPGA, external interface hard core peripherals, custom internal soft core peripherals and the soft core processor. The transition to embedded design with the parallel processing capabilities and coarse grained architecture of the modern FPGA is described by in-part by the translation of C/C++ program segments for real-time processing to a controller and datapath construct or an FSM. However, the availability of the Xilinx 8-bit PicoBlazeTM and 32-bit MicroBlazeTM soft core processors and the emergence of the ARM® hard core processor and AMBA bus for the Xilinx Zynq™ Extensible Processing Platform (EPP) now also challenges the conventional microprocessor with its fixed architecture for embedded design.

Trends in Embedded Design Using Programmable Gate Arrays features the Xilinx Spartan®-6 FPGA on the Digilent NexysTM 3 Board and the AtlysTM Board evaluation hardware, the Xilinx Integrated Synthesis Environment (ISE®) electronic design automation software tool in the Verilog HDL, Xilinx CORE Generator for LogiCORE™ blocks and an introduction to the Xilinx Zynq EPP. The complete Xilinx ISE projects and Verilog HDL modules described in the Chapters are available for download.

The prior text (2008) Embedded Design Using Programmable Gate Arrays features the Xilinx Spartan-3E™ FPGA and the Digilent Basys Board and the Spartan-3E Starter Board and is described here.

 

Purchase  The text can be purchased at Bookstand Publishing

 

Download  Complete Xilinx ISE WebPACK Projects to accompany Trends in Embedded Design Using Programmable Gate Arrays  for the Digilent Nexys3 and Atlys Spartan-6 can be downloaded in ZIP archive format here (~36 MB, s6TEDPGA.zip). The ZIP archive files are password protected as described in Appendix A of the text.

 

           
Table of Contents

              Chapter One    Verilog Hardware Description Language                                                                                      

                                                     Programmable Logic Devices
                                                     Hardware Description Language
                                                                  
ABEL
                                                                   Verilog
                                                     Verilog Syntax and Concept
                                                    
              Number Formats
                                                                   Signal Data Types
                                                                   Strings and Arrays
                                                                   Signal Operations
                                                                   Arithmetic Operations
                                                     Structural Models in Verilog
                                                                   Modules
                                                                   Ports
                                                                   Nested Modules
                                                                   User Defined Primitives
                                                     Behavioral Models in Verilog
                                                                   Continuous Assignment 
                                                                   Single Pass Behavior
                                                                   Cyclic Behavior
                                                                   Blocking and Non-Blocking Assignments
                                                                   Control Flow
                                                                   Functions and Tasks
                                                     Finite State Machines
                                                     Controller-Datapath Construct
                                                     C to Verilog Translation
                                                     Arithmetic Functions
                                                     Programmable Gate Array and Microprocessor Comparison
                                                     Summary
                                                     References

                Chapter 2       Verilog Design Automation

                                                     Xilinx Integrated Synthesis Environment
                                                                   Project Creation
                                                                   Project Implementation
                                                                   Design Summary
                                                     Xilinx CORE Generator
                                                                   LogiCORE Creation
                                                                   Implementation Comparison
                                                     Xilinx PlanAhead
                                                                  Floorplan Design
                                                     Xilinx Simulator
                                                     Xilinx Verilog Language Templates
                                                     Xilinx Architecture Wizard
                                                                 Clocking Wizard
                                                                 SelectIO Interface Wizard
                                                     Xilinx LogiCORE Blocks
                                                     Warnings and Errors in Synthesis
                                                     Summary
                                                     References                                                                                                                                                 

                Chapter 3       Programmable Gate Array Hardware

                                                     Evaluation Boards
                                                                 Nexys 3 Board
                                                                 Atlys Board
                                                                 Selection of an Evaluation Boa
                                                    User Constraints File
                                                    Hardware Components and Peripherals
                                                                Crystal Clock Oscillator
                                                                Light Emitting Diodes
                                                                Push Buttons and Slide Switches
                                                                PmodKYPD Keypad
                                                                PmodENC Rotary Shaft Encoder
                                                                Seven Segment Display
                                                                PmodCLP Parallel Liquid Crystal Display

                            PmodCLS Serial Liquid Crystal Display
                                   PS/2 Keyboard Port
                                   PS/2 Mouse Port
                                   PmodJSTK Joystick
                                   Digital-to-Analog Converter
                                                PmodDAC
                                                PmodDA1
                                                PmodDA2
                                                PmodDA3
                                                PmodDA4
                                   Analog-to-Digital Converter
                                                PmodADC
                                                PmodAD1
                                                PmodAD2                                                                                     

                                        AC97 Codec

                            Video Graphics Array
                                   Serial Data Link Protocols
                                               Serial Peripheral Interface
                                                Inter-Integrated Circuit
                                   Summary

                            References 

                Chapter 4       Digital Signal Processing, Communications and Control

                                                                Sampling and Quantization
                                                                Discrete Time Sequences
                                                                Discrete Frequency Response
                                                                Analog Output
                                                                Digital Signal Processing Embedded System
                                                                IIR Digital Filter
                                                                FIR Digital Filter
                                                                FIR Compiler LogiCORE Block
                                                                FIR Compiler Digital Filter
                                                                FIR Compiler Implementations
                                                                Direct Digital Synthesis Compiler LogiCORE Block

                                                                            Sine-Cosine Look-Up Table
                                                                            DTMF Generator
                                                                            Direct Digital Synthesizer
                                                                            Frequency Generator
                                                                            Frequency Shift Keying Modulator
                                                                            Phase Shift Keying Modulator
                                                                Data Communication
                                                                            RS-232 Standard
                                                                            PmodUSBUART UART Bridge
                                                                            PmodRS232 Voltage Converter
                                                                            Manchester Encoder-Decoder
                                                                            PmodBT2 Bluetooth Wiressless Communication
                                                                Sensors
                                                                            PmodACL Accelerometer
                                                                            PmodGYRO Gyroscope
                                                                            Pmod Temperature Sensor and Thermostat

                                                                Digital Control 
                                                                            Pulse Width Modulation
                                                                            DC Servomotor Speed Control
                                                                            PmodHB5 H-Bridge
                                                                Expansion Peripherals
                                                                VmodCAM Stereo Camera
                                                                VmodTFT Color LCD and Touchscreen

                                                                Summary
                                                                References

            Chapter 5       Extensible Processing Platform

                                                    Extensible Processing Platform
                                                                Xilinx Zynq-7000
                                                                Zynq EPP Processing System
                                                                Zynq EPP Programmable Logic
                                                                ZedBoard
                                                                Zynq EPP Design Automation
                                                                Zynq EPP Operating Systems
                                                               
Summary
                                                                References

            Appendix

 

                                                             Project File Download